MPAM Hypervisor Control Register (EL2)
Controls the PARTID virtualization features of MPAM.
This register is present only when (FEAT_AA64EL2 is implemented and ((FEAT_MPAMv1p0 is implemented or FEAT_MPAMv0p1 is implemented) and MPAMIDR_EL1.HAS_HCR == '1')) or FEAT_MPAMv2 is implemented. Otherwise, direct accesses to MPAMHCR_EL2 are UNDEFINED.
This register has no effect if EL2 is not enabled in the current Security state.
MPAMHCR_EL2 is a 64-bit register.
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | nTIDR | RES0 | nTRAPMPAMSM | nTRAPMPAM0EL1 | nTRAPMPAM1EL1 | RES0 | |||||||||||||||||||||||||
| RES0 | |||||||||||||||||||||||||||||||
Reserved, RES0.
Traps accesses to MPAMIDR_EL1 from EL1 to EL2.
| nTIDR | Meaning |
|---|---|
| 0b0 |
Accesses to MPAMIDR_EL1 from EL1 are trapped to EL2. |
| 0b1 |
Accesses to MPAMIDR_EL1 from EL1 are not trapped by this mechanism. |
The reset behavior of this field is:
Reserved, RES0.
Traps accesses to MPAMSM_EL1 from EL1 to EL2.
| nTRAPMPAMSM | Meaning |
|---|---|
| 0b0 |
Accesses to MPAMSM_EL1 from EL1 are trapped to EL2. |
| 0b1 |
Accesses to MPAMSM_EL1 from EL1 are not trapped by this mechanism. |
The reset behavior of this field is:
Reserved, RES0.
Traps accesses to MPAM0_EL1 from EL1 to EL2.
| nTRAPMPAM0EL1 | Meaning |
|---|---|
| 0b0 |
Accesses to MPAM0_EL1 from EL1 are trapped to EL2. |
| 0b1 |
Accesses to MPAM0_EL1 from EL1 are not trapped by this mechanism. |
The reset behavior of this field is:
Traps accesses to MPAM1_EL1 and MPAMCTL_EL1 from EL1 to EL2.
| nTRAPMPAM1EL1 | Meaning |
|---|---|
| 0b0 |
Accesses to MPAM1_EL1 and MPAMCTL_EL1 from EL1 are trapped to EL2. |
| 0b1 |
Accesses to MPAM1_EL1 and MPAMCTL_EL1 from EL1 are not trapped by this mechanism. |
The reset behavior of this field is:
Reserved, RES0.
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | |||||||||||||||||||||||||||||||
| TRAP_MPAMIDR_EL1 | RES0 | GSTAPP_PLK | RES0 | EL1_VPMEN | EL0_VPMEN | ||||||||||||||||||||||||||
Reserved, RES0.
Trap accesses from EL1 to MPAMIDR_EL1 to EL2.
| TRAP_MPAMIDR_EL1 | Meaning |
|---|---|
| 0b0 |
This control does not cause any instructions to be trapped. |
| 0b1 |
Direct accesses to MPAMIDR_EL1 from EL1 are trapped to EL2. |
The reset behavior of this field is:
Reserved, RES0.
Make the PARTIDs at EL0 the same as the PARTIDs at EL1. When executing at EL0, EL2 is enabled, HCR_EL2.TGE == 0 and GSTAPP_PLK = 1, MPAM1_EL1 is used instead of MPAM0_EL1 to generate MPAM labels for memory requests.
| GSTAPP_PLK | Meaning |
|---|---|
| 0b0 |
MPAM0_EL1 is used to generate MPAM labels when executing at EL0. |
| 0b1 |
MPAM1_EL1 is used to generate MPAM labels when executing at EL0 with EL2 enabled and HCR_EL2.TGE == 0. Otherwise MPAM0_EL1 is used. |
The reset behavior of this field is:
Reserved, RES0.
Enable virtualized identifiers in MPAM1_EL1 when executing at EL1. This bit also enables virtualized identifiers when MPAM1_EL1 is used to generate MPAM identifiers for memory requests at EL0 due to GSTAPP_PLK == 1.
| EL1_VPMEN | Meaning |
|---|---|
| 0b0 |
MPAM1_EL1.PARTID_I and MPAM1_EL1.PARTID_D are physical PARTIDs used to label memory system requests. |
| 0b1 |
MPAM1_EL1.PARTID_I and MPAM1_EL1.PARTID_D are virtual PARTIDs used to index the MPAMVPMn_EL2.PhyPARTID fields to map the virtual PARTID into a physical PARTID to label memory system requests. |
The reset behavior of this field is:
Enable virtualized identifiers in MPAM0_EL1 unless the Effective value of HCR_EL2.{E2H, TGE} is {1, 1}.
When the Effective value of HCR_EL2.{E2H, TGE} is {1, 1}, EL0_VPMEN is ignored and MPAM0_EL1 identifiers are not virtualized.
When MPAMHCR_EL2.GSTAPP_PLK == 1 and HCR_EL2.TGE == 0, MPAM1_EL1 is used as the source of identifiers and the virtualization of identifiers in MPAM1_EL1 is controlled by MPAMHCR_EL2.EL1_VPMEN.
| EL0_VPMEN | Meaning |
|---|---|
| 0b0 |
MPAM0_EL1.PARTID_I and MPAM0_EL1.PARTID_D are physical PARTIDs used to label memory system requests. |
| 0b1 |
MPAM0_EL1.PARTID_I and MPAM0_EL1.PARTID_D are virtual PARTIDs used to index the MPAMVPMn_EL2.PhyPARTID fields to map the virtual PARTID into a physical PARTID to label memory system requests. |
The reset behavior of this field is:
Accesses to this register use the following encodings in the System register encoding space:
MRS <Xt>, MPAMHCR_EL2
(op0 = 0b11, op1 = 0b100, CRn = 0b1010, CRm = 0b0100, op2 = 0b000)
if !((IsFeatureImplemented(FEAT_AA64EL2) && ((IsFeatureImplemented(FEAT_MPAMv1p0) || IsFeatureImplemented(FEAT_MPAMv0p1)) && MPAMIDR_EL1().HAS_HCR == '1')) || IsFeatureImplemented(FEAT_MPAMv2)) then Undefined(); elsif HaveEL(EL3) && PSTATE.EL == EL2 && EL3SDDUndefPriority() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then Undefined(); elsif HaveEL(EL3) && PSTATE.EL == EL2 && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EffectiveHCR_EL2_NVx() IN {'1x1'} then X{64}(t) = NVMem(0x930); elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then if HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else AArch64_SystemAccessTrap(EL2, 0x18); end; else Undefined(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = MPAMHCR_EL2(); end; elsif PSTATE.EL == EL3 then X{64}(t) = MPAMHCR_EL2(); end;
MSR MPAMHCR_EL2, <Xt>
(op0 = 0b11, op1 = 0b100, CRn = 0b1010, CRm = 0b0100, op2 = 0b000)
if !((IsFeatureImplemented(FEAT_AA64EL2) && ((IsFeatureImplemented(FEAT_MPAMv1p0) || IsFeatureImplemented(FEAT_MPAMv0p1)) && MPAMIDR_EL1().HAS_HCR == '1')) || IsFeatureImplemented(FEAT_MPAMv2)) then Undefined(); elsif HaveEL(EL3) && PSTATE.EL == EL2 && EL3SDDUndefPriority() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then Undefined(); elsif HaveEL(EL3) && PSTATE.EL == EL2 && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EffectiveHCR_EL2_NVx() IN {'1x1'} then NVMem(0x930) = X{64}(t); elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then if HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else AArch64_SystemAccessTrap(EL2, 0x18); end; else Undefined(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else MPAMHCR_EL2() = X{64}(t); end; elsif PSTATE.EL == EL3 then MPAMHCR_EL2() = X{64}(t); end;
Version 2026.06 — Copyright © 2010-2026 Arm Limited or its affiliates.
This site is provided as a community resource and is NOT affiliated with nor endorsed by Arm Limited.