MPAM0 Register (EL1)
Holds information to generate MPAM labels for memory requests when executing at EL0.
This register is present only when FEAT_MPAM is implemented. Otherwise, direct accesses to MPAM0_EL1 are UNDEFINED.
If FEAT_MPAM is implemented, EL2 is implemented and enabled in the current Security state, and the MPAM virtualization option is present, then:
If MPAMHCR_EL2.GSTAPP_PLK == 1 and the Effective value of HCR_EL2.TGE is 0, MPAM1_EL1 is used instead of MPAM0_EL1 to generate MPAM information to label memory requests.
If the Effective value of HCR_EL2.{E2H, TGE} is not {1, 1} and MPAMHCR_EL2.EL0_VPMEN == 1, then MPAM PARTIDs in MPAM0_EL1 are virtual and mapped into physical PARTIDs for the current Security state.
MPAM0_EL1 is a 64-bit register.
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| altPMG | PMG | ||||||||||||||||||||||||||||||
| altPARTID | PARTID | ||||||||||||||||||||||||||||||
Alternative performance monitoring group for accesses made from EL0.
The reset behavior of this field is:
Reserved, RES0.
Performance monitoring group for accesses made from EL0.
The reset behavior of this field is:
Alternative Partition ID for accesses made from EL0.
The reset behavior of this field is:
Reserved, RES0.
Partition ID for accesses made from EL0.
The reset behavior of this field is:
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | PMG_D | PMG_I | |||||||||||||||||||||||||||||
| PARTID_D | PARTID_I | ||||||||||||||||||||||||||||||
Reserved, RES0.
Performance monitoring group property for PARTID_D.
The reset behavior of this field is:
Performance monitoring group property for PARTID_I.
The reset behavior of this field is:
Partition ID for data accesses, including load and store accesses, made from EL0.
The reset behavior of this field is:
Partition ID for instruction accesses made from EL0.
The reset behavior of this field is:
None of the fields in this register are permitted to be cached in a TLB.
Accesses to this register use the following encodings in the System register encoding space:
MRS <Xt>, MPAM0_EL1
(op0 = 0b11, op1 = 0b000, CRn = 0b1010, CRm = 0b0101, op2 = 0b001)
if !IsFeatureImplemented(FEAT_MPAM) then Undefined(); elsif HaveEL(EL3) && !(EffectivelyAtEL0InHost() || EffectivelyAtEL0NotInHost() || PSTATE.EL == EL3) && EL3SDDUndefPriority() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then Undefined(); elsif HaveEL(EL3) && !(EffectivelyAtEL0InHost() || EffectivelyAtEL0NotInHost() || PSTATE.EL == EL3) && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif EL2Enabled() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM2_EL2().TRAPMPAM0EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_MPAMv2) && MPAMHCR_EL2().nTRAPMPAM0EL1 == '0' then AArch64_SystemAccessTrap(EL2, 0x18); else X{64}(t) = MPAM0_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = MPAM0_EL1(); end; elsif PSTATE.EL == EL3 then X{64}(t) = MPAM0_EL1(); end;
MSR MPAM0_EL1, <Xt>
(op0 = 0b11, op1 = 0b000, CRn = 0b1010, CRm = 0b0101, op2 = 0b001)
if !IsFeatureImplemented(FEAT_MPAM) then Undefined(); elsif HaveEL(EL3) && !(EffectivelyAtEL0InHost() || EffectivelyAtEL0NotInHost() || PSTATE.EL == EL3) && EL3SDDUndefPriority() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then Undefined(); elsif HaveEL(EL3) && !(EffectivelyAtEL0InHost() || EffectivelyAtEL0NotInHost() || PSTATE.EL == EL3) && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif EL2Enabled() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM2_EL2().TRAPMPAM0EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_MPAMv2) && MPAMHCR_EL2().nTRAPMPAM0EL1 == '0' then AArch64_SystemAccessTrap(EL2, 0x18); else MPAM0_EL1() = X{64}(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_MPAMv2) && MPAMCTL_EL3().nTRAPLOWER == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else MPAM0_EL1() = X{64}(t); end; elsif PSTATE.EL == EL3 then MPAM0_EL1() = X{64}(t); end;
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