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ANDS (immediate)

Bitwise AND (immediate), setting flags

This instruction performs a bitwise AND of a register value and an immediate value, and writes the result to the destination register. It updates the condition flags based on the result.

This instruction is used by the alias TST (immediate).

313029282726252423222120191817161514131211109876543210
sf11100100NimmrimmsRnRd
opc

32-bit encoding

(sf == 0 && N == 0)

ANDS <Wd>, <Wn>, #<imm>

64-bit encoding

(sf == 1)

ANDS <Xd>, <Xn>, #<imm>

Decode (all encodings)

if sf == '0' && N != '0' then EndOfDecode(Decode_UNDEF); constant integer d = UInt(Rd); constant integer n = UInt(Rn); constant integer datasize = 32 << UInt(sf); bits(datasize) imm; (imm, -) = DecodeBitMasks(N, imms, immr, TRUE, datasize);

Assembler Symbols

<Wd>

Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Wn>

Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field.

<imm>

For the "32-bit" variant: is the bitmask immediate, encoded in "imms:immr".

For the "64-bit" variant: is the bitmask immediate, encoded in "N:imms:immr".

<Xd>

Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn>

Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field.

Alias Conditions

AliasIs preferred when
TST (immediate)Rd == '11111'

Operation

constant bits(datasize) operand1 = X[n, datasize]; constant bits(datasize) operand2 = imm; constant bits(datasize) result = operand1 AND operand2; X[d, datasize] = result; PSTATE.<N,Z,C,V> = result<datasize-1>:IsZeroBit(result):'00';

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


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