ANDS (immediate)

Bitwise AND (immediate), setting flags

This instruction performs a bitwise AND of a register value and an immediate value, and writes the result to the destination register. It updates the condition flags based on the result.

This instruction is used by the alias TST (immediate).

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
sf	1	1	1	0	0	1	0	0	N	immr						imms						Rn					Rd
	opc

Encoding for the 32-bit variant

Applies when (sf == 0 && N == 0)

ANDS <Wd>, <Wn>, #<imm>

Encoding for the 64-bit variant

Applies when (sf == 1)

ANDS <Xd>, <Xn>, #<imm>

Decode for all variants of this encoding

if sf == '0' && N != '0' then EndOfDecode(Decode_UNDEF); constant integer d = UInt(Rd); constant integer n = UInt(Rn); constant integer datasize = 32 << UInt(sf); bits(datasize) imm; (imm, -) = DecodeBitMasks(N, imms, immr, TRUE, datasize);

Assembler Symbols

<Wd>	Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Wn>	Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field.

<imm>	For the "32-bit" variant: is the bitmask immediate, encoded in "imms:immr".
	For the "64-bit" variant: is the bitmask immediate, encoded in "N:imms:immr".

<Xd>	Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn>	Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field.

Alias Conditions

Alias	Is preferred when
TST (immediate)	Rd == '11111'

Operation

constant bits(datasize) operand1 = X[n, datasize]; constant bits(datasize) operand2 = imm; constant bits(datasize) result = operand1 AND operand2; X[d, datasize] = result; PSTATE.<N,Z,C,V> = result<datasize-1>:IsZeroBit(result):'00';