Controls the selection of the resources in the trace unit.
External register TRCRSCTLR<n> bits [31:0] are architecturally mapped to AArch64 System register TRCRSCTLR<n>[31:0].
This register is present only when FEAT_ETE is implemented, FEAT_TRC_EXT is implemented and (UInt(TRCIDR4.NUMRSPAIR) + 1) * 2 > n. Otherwise, direct accesses to TRCRSCTLR<n> are RES0.
Resource selector 0 always returns FALSE.
Resource selector 1 always returns TRUE.
Resource selectors are implemented in pairs. Each odd numbered resource selector is part of a pair with the even numbered resource selector that is numbered as one less than it. For example, resource selectors 2 and 3 form a pair.
TRCRSCTLR<n> is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | PAIRINV | INV | GROUP | SELECT |
Reserved, RES0.
Controls whether the combined result from a resource selector pair is inverted.
PAIRINV | Meaning |
---|---|
0b0 |
Do not invert the combined output of the 2 resource selectors. |
0b1 |
Invert the combined output of the 2 resource selectors. |
If:
Then the combined output of the 2 resource selectors A and B depends on the value of (A.PAIRINV, A.INV, B.INV) as follows:
The reset behavior of this field is:
Reserved, RES0.
Controls whether the resource, that TRCRSCTLR<n>.GROUP and TRCRSCTLR<n>.SELECT selects, is inverted.
INV | Meaning |
---|---|
0b0 |
Do not invert the output of this selector. |
0b1 |
Invert the output of this selector. |
The reset behavior of this field is:
Selects a group of resources.
GROUP | Meaning | SELECT |
---|---|---|
0b0000 |
External Input Selectors. | SELECT encoding for External Input Selectors |
0b0001 |
PE Comparator Inputs. | SELECT encoding for PE Comparator Inputs |
0b0010 |
Counters and Sequencer. | SELECT encoding for Counters and Sequencer |
0b0011 |
Single-shot Comparator Controls. | SELECT encoding for Single-shot Comparator Controls |
0b0100 |
Single Address Comparators. | SELECT encoding for Single Address Comparators |
0b0101 |
Address Range Comparators. | SELECT encoding for Address Range Comparators |
0b0110 |
Context Identifier Comparators. | SELECT encoding for Context Identifier Comparators |
0b0111 |
Virtual Context Identifier Comparators. | SELECT encoding for Virtual Context Identifier Comparators |
All other values are reserved.
The reset behavior of this field is:
Resource Specific Controls. Contains the controls specific to the resource group selected by GROUP, described in the following sections.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | EXTIN[3] | EXTIN[2] | EXTIN[1] | EXTIN[0] |
Reserved, RES0.
Selects one or more External Inputs.
EXTIN[<m>] | Meaning |
---|---|
0b0 |
Ignore EXTIN <m>. |
0b1 |
Select EXTIN <m>. |
This bit is RES0 if m >= TRCIDR5.NUMEXTINSEL.
The reset behavior of this field is:
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | PECOMP[7] | PECOMP[6] | PECOMP[5] | PECOMP[4] | PECOMP[3] | PECOMP[2] | PECOMP[1] | PECOMP[0] |
Reserved, RES0.
Selects one or more PE Comparator Inputs.
PECOMP[<m>] | Meaning |
---|---|
0b0 |
Ignore PE Comparator Input <m>. |
0b1 |
Select PE Comparator Input <m>. |
This bit is RES0 if m >= TRCIDR4.NUMPC.
The reset behavior of this field is:
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | SEQUENCER[3] | SEQUENCER[2] | SEQUENCER[1] | SEQUENCER[0] | COUNTERS[3] | COUNTERS[2] | COUNTERS[1] | COUNTERS[0] |
Reserved, RES0.
Sequencer states.
SEQUENCER[<m>] | Meaning |
---|---|
0b0 |
Ignore Sequencer state <m>. |
0b1 |
Select Sequencer state <m>. |
This bit is RES0 if m >= TRCIDR5.NUMSEQSTATE.
The reset behavior of this field is:
Counters resources at zero.
COUNTERS[<m>] | Meaning |
---|---|
0b0 |
Ignore Counter <m>. |
0b1 |
Select Counter <m> is zero. |
This bit is RES0 if m >= TRCIDR5.NUMCNTR.
The reset behavior of this field is:
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | SINGLE_SHOT[7] | SINGLE_SHOT[6] | SINGLE_SHOT[5] | SINGLE_SHOT[4] | SINGLE_SHOT[3] | SINGLE_SHOT[2] | SINGLE_SHOT[1] | SINGLE_SHOT[0] |
Reserved, RES0.
Selects one or more Single-shot Comparator Controls.
SINGLE_SHOT[<m>] | Meaning |
---|---|
0b0 |
Ignore Single-shot Comparator Control <m>. |
0b1 |
Select Single-shot Comparator Control <m>. |
This bit is RES0 if m >= TRCIDR4.NUMSSCC.
The reset behavior of this field is:
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SAC[15] | SAC[14] | SAC[13] | SAC[12] | SAC[11] | SAC[10] | SAC[9] | SAC[8] | SAC[7] | SAC[6] | SAC[5] | SAC[4] | SAC[3] | SAC[2] | SAC[1] | SAC[0] |
Selects one or more Single Address Comparators.
SAC[<m>] | Meaning |
---|---|
0b0 |
Ignore Single Address Comparator <m>. |
0b1 |
Select Single Address Comparator <m>. |
This bit is RES0 if m >= 2 × TRCIDR4.NUMACPAIRS.
The reset behavior of this field is:
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | ARC[7] | ARC[6] | ARC[5] | ARC[4] | ARC[3] | ARC[2] | ARC[1] | ARC[0] |
Reserved, RES0.
Selects one or more Address Range Comparators.
ARC[<m>] | Meaning |
---|---|
0b0 |
Ignore Address Range Comparator <m>. |
0b1 |
Select Address Range Comparator <m>. |
This bit is RES0 if m >= TRCIDR4.NUMACPAIRS.
The reset behavior of this field is:
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | CID[7] | CID[6] | CID[5] | CID[4] | CID[3] | CID[2] | CID[1] | CID[0] |
Reserved, RES0.
Selects one or more Context Identifier Comparators.
CID[<m>] | Meaning |
---|---|
0b0 |
Ignore Context Identifier Comparator <m>. |
0b1 |
Select Context Identifier Comparator <m>. |
This bit is RES0 if m >= TRCIDR4.NUMCIDC.
The reset behavior of this field is:
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | VMID[7] | VMID[6] | VMID[5] | VMID[4] | VMID[3] | VMID[2] | VMID[1] | VMID[0] |
Reserved, RES0.
Selects one or more Virtual Context Identifier Comparators.
VMID[<m>] | Meaning |
---|---|
0b0 |
Ignore Virtual Context Identifier Comparator <m>. |
0b1 |
Select Virtual Context Identifier Comparator <m>. |
This bit is RES0 if m >= TRCIDR4.NUMVMIDC.
The reset behavior of this field is:
Must be programmed if any of the following are true:
Writes are CONSTRAINED UNPREDICTABLE if the trace unit is not in the Idle state.
Component | Offset | Instance |
---|---|---|
ETE | 0x200 + (4 * n) | TRCRSCTLR<n> |
This interface is accessible as follows: