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TRCDEVARCH: Trace Device Architecture Register

Purpose

Provides discovery information for the component.

For additional information, see the CoreSight Architecture Specification.

Configuration

External register TRCDEVARCH bits [31:0] are architecturally mapped to AArch64 System register TRCDEVARCH[31:0].

This register is present only when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented. Otherwise, direct accesses to TRCDEVARCH are RES0.

Attributes

TRCDEVARCH is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
ARCHITECTPRESENTREVISIONARCHVERARCHPART

ARCHITECT, bits [31:21]

Architect. Defines the architect of the component. Bits [31:28] are the JEP106 continuation code (JEP106 bank ID, minus 1) and bits [27:21] are the JEP106 ID code.

ARCHITECTMeaning
0b01000111011

JEP106 continuation code 0x4, ID code 0x3B.

Other values are defined by the JEDEC JEP106 standard.

This field reads as 0x23B.

Access to this field is RO.

PRESENT, bit [20]

DEVARCH Present. Defines that the DEVARCH register is present.

The value of this field is an IMPLEMENTATION DEFINED choice of:

PRESENTMeaning
0b0

Device Architecture information not present.

0b1

Device Architecture information present.

This field reads as 1.

Access to this field is RO.

REVISION, bits [19:16]

Revision. Defines the architecture revision of the component.

The value of this field is an IMPLEMENTATION DEFINED choice of:

REVISIONMeaning
0b0000

ETEv1.0, FEAT_ETE.

0b0001

ETEv1.1, FEAT_ETEv1p1.

0b0010

ETEv1.2, FEAT_ETEv1p2.

0b0011

ETEv1.3, FEAT_ETEv1p3.

All other values are reserved.

Access to this field is RO.

ARCHVER, bits [15:12]

Architecture Version. Defines the architecture version of the component.

ARCHVERMeaning
0b0101

ETEv1.

ARCHVER and ARCHPART are also defined as a single field, ARCHID, so that ARCHVER is ARCHID[15:12].

This field reads as 0x5.

Access to this field is RO.

ARCHPART, bits [11:0]

Architecture Part. Defines the architecture of the component.

ARCHPARTMeaning
0xA13

Arm PE trace architecture.

ARCHVER and ARCHPART are also defined as a single field, ARCHID, so that ARCHPART is ARCHID[11:0].

This field reads as 0xA13.

Access to this field is RO.

Accessing TRCDEVARCH

External debugger accesses to this register are unaffected by the OS Lock.

TRCDEVARCH can be accessed through the external debug interface:

ComponentOffsetInstance
ETE0xFBCTRCDEVARCH

This interface is accessible as follows: