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Activity Monitors Device Type Register
Indicates to a debugger that this component is part of a PE's performance monitor interface.
Configuration
It is IMPLEMENTATION DEFINED whether AMDEVTYPE is implemented in the Core power domain or in the Debug power domain.
This register is present only when FEAT_AMUv1 is implemented and an implementation implements AMDEVTYPE. Otherwise, direct accesses to AMDEVTYPE are RES0.
Attributes
AMDEVTYPE is a 32-bit register.
This register is part of the AMU block.
Field descriptions
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | SUB | MAJOR |
Bits [31:8]:
SUB, bits [7:4]:
Subtype.
| SUB | Meaning |
|---|
| 0b0001 |
Component within a PE.
|
Access to this field is RO.
MAJOR, bits [3:0]:
Major type.
| MAJOR | Meaning |
|---|
| 0b0110 |
Performance monitor component.
|
Access to this field is RO.
Access Instructions
Accesses to this register use the following encodings:
When FEAT_AMU_EXT64 is implemented:
Accessible at offset 0xFCC from AMU
- When boolean IMPLEMENTATION_DEFINED "AMU CoreSight management registers ignore access controls", accesses to this register are RO.
- When FEAT_RME is implemented, FEAT_AMU_EXTACR is implemented, an access is Secure, and AMROOTCR.RA IN {0b01, 0b00}, accesses to this register are RAZ/WI.
- When FEAT_RME is implemented, FEAT_AMU_EXTACR is implemented, an access is Realm, and AMROOTCR.RA IN {0b10, 0b00}, accesses to this register are RAZ/WI.
- When FEAT_RME is implemented, FEAT_AMU_EXTACR is implemented, an access is Non-secure, and AMROOTCR.RA != 0b11, accesses to this register are RAZ/WI.
- When FEAT_RME is not implemented, FEAT_AMU_EXTACR is implemented, an access is Non-secure, and AMSCR.NSRA == 0, accesses to this register are RAZ/WI.
- Otherwise, accesses to this register are RO.
()
When FEAT_AMU_EXT32 is implemented:
Accessible at offset 0xFCC from AMU
- When boolean IMPLEMENTATION_DEFINED "AMU CoreSight management registers ignore access controls", accesses to this register are RO.
- When FEAT_RME is implemented, FEAT_AMU_EXTACR is implemented, an access is Secure, and AMROOTCR.RA IN {0b01, 0b00}, accesses to this register are RAZ/WI.
- When FEAT_RME is implemented, FEAT_AMU_EXTACR is implemented, an access is Realm, and AMROOTCR.RA IN {0b10, 0b00}, accesses to this register are RAZ/WI.
- When FEAT_RME is implemented, FEAT_AMU_EXTACR is implemented, an access is Non-secure, and AMROOTCR.RA != 0b11, accesses to this register are RAZ/WI.
- When FEAT_RME is not implemented, FEAT_AMU_EXTACR is implemented, an access is Non-secure, and AMSCR.NSRA == 0, accesses to this register are RAZ/WI.
- Otherwise, accesses to this register are RO.
()
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