PM | Jon's Arm Reference

This register is present only when (FEAT_EBEP is implemented, or FEAT_SPE_EXC is implemented, or FEAT_TRBE_EXC is implemented) and FEAT_AA64 is implemented. Otherwise, direct accesses to PM are UNDEFINED.

Attributes

Field descriptions

Bits [63:33]:

PM, bit [32]:

PMU Exception Mask.

PM	Meaning
0b0	Does not cause the Profiling exception to be masked.
0b1	Causes the Profiling exception to be masked.

The reset behavior of this field is:

On a Warm reset, this field resets to an architecturally UNKNOWN value.

Bits [31:0]:

Access Instructions

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, PM

(op0 = 0b11, op1 = 0b000, CRn = 0b0100, CRm = 0b0011, op2 = 0b001)

if !((IsFeatureImplemented(FEAT_EBEP) || IsFeatureImplemented(FEAT_SPE_EXC) || IsFeatureImplemented(FEAT_TRBE_EXC)) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then X{64}(t) = Zeros{31} :: PSTATE.PM :: Zeros{32}; elsif PSTATE.EL == EL2 then X{64}(t) = Zeros{31} :: PSTATE.PM :: Zeros{32}; elsif PSTATE.EL == EL3 then X{64}(t) = Zeros{31} :: PSTATE.PM :: Zeros{32}; end;

MSR PM, <Xt>

(op0 = 0b11, op1 = 0b000, CRn = 0b0100, CRm = 0b0011, op2 = 0b001)

if !((IsFeatureImplemented(FEAT_EBEP) || IsFeatureImplemented(FEAT_SPE_EXC) || IsFeatureImplemented(FEAT_TRBE_EXC)) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then PSTATE.PM = X{64}(t)[32]; elsif PSTATE.EL == EL2 then PSTATE.PM = X{64}(t)[32]; elsif PSTATE.EL == EL3 then PSTATE.PM = X{64}(t)[32]; end;

MSR PM, #<imm>

(op0 = 0b00, op1 = 0b001, CRn = 0b0100, CRm = 0b001x, op2 = 0b000)

63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
RES0																															PM
RES0