Interrupt Controller Virtual PPI Handling mode Registers
Report whether virtual PPIs are Edge or Level.
This register is present only when FEAT_GCIE is implemented, EL2 is implemented, and FEAT_AA64 is implemented. Otherwise, direct accesses to ICV_PPI_HMR<n>_EL1 are UNDEFINED.
ICV_PPI_HMR<n>_EL1 is a 64-bit register.
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| HM63 | HM62 | HM61 | HM60 | HM59 | HM58 | HM57 | HM56 | HM55 | HM54 | HM53 | HM52 | HM51 | HM50 | HM49 | HM48 | HM47 | HM46 | HM45 | HM44 | HM43 | HM42 | HM41 | HM40 | HM39 | HM38 | HM37 | HM36 | HM35 | HM34 | HM33 | HM32 |
| HM31 | HM30 | HM29 | HM28 | HM27 | HM26 | HM25 | HM24 | HM23 | HM22 | HM21 | HM20 | HM19 | HM18 | HM17 | HM16 | HM15 | HM14 | HM13 | HM12 | HM11 | HM10 | HM9 | HM8 | HM7 | HM6 | HM5 | HM4 | HM3 | HM2 | HM1 | HM0 |
PPI <(n * 64) + x> Handling mode.
| HM<x> | Meaning |
|---|---|
| 0b0 |
Edge |
| 0b1 |
Level |
Accessing this field has the following behavior:
This register is Read-only.
Accesses to this register use the following encodings in the System register encoding space:
MRS <Xt>, ICC_PPI_HMR<n>_EL1 ; Where n = 0-1
(op0 = 0b11, op1 = 0b000, CRn = 0b1100, CRm = 0b1010, op2 = 0b00:n[0])
let n:integer = UInt(op2[0]); if !(IsFeatureImplemented(FEAT_GCIE) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && HCR_EL2().IMO == '1' && IsFeatureImplemented(FEAT_GCIE_LEGACY) && ICH_VCTLR_EL2().V3 == '1' then Undefined(); elsif EL2Enabled() && ICH_HFGRTR_EL2().ICC_PPI_HMRn_EL1 == '0' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2().IMO == '1' then X{64}(t) = ICV_PPI_HMR_EL1(n); else X{64}(t) = ICC_PPI_HMR_EL1(n); end; elsif PSTATE.EL == EL2 then X{64}(t) = ICC_PPI_HMR_EL1(n); elsif PSTATE.EL == EL3 then X{64}(t) = ICC_PPI_HMR_EL1(n); end;
Version 2026.06 — Copyright © 2010-2026 Arm Limited or its affiliates.
This site is provided as a community resource and is NOT affiliated with nor endorsed by Arm Limited.