ICC_DOMHPPIR_EL3

This register is present only when FEAT_GCIE is implemented, EL3 is implemented, and FEAT_AA64 is implemented. Otherwise, direct accesses to ICC_DOMHPPIR_EL3 are UNDEFINED.

Attributes

Field descriptions

Bits [63:4]:

P_HPPI, bit [3]:

Preemptive HPPI for the Preemptive Interrupt Domain valid bit.

P_HPPI	Meaning
0b0	There is no Preemptive HPPI of Sufficient priority for the Preemptive Interrupt Domain.
0b1	There is a Preemptive HPPI of Sufficient priority for the Preemptive Interrupt Domain.

Accessing this field has the following behavior:

When HavePreemptiveDomain(), access to this field is RO.
Otherwise, access to this field is RES0 .

RL_HPPI, bit [2]:

HPPI for Realm Interrupt Domain valid bit.

RL_HPPI	Meaning
0b0	There is no HPPI of Sufficient priority for Realm Interrupt Domain.
0b1	There is an HPPI of Sufficient priority for Realm Interrupt Domain.

Accessing this field has the following behavior:

When IsGICDomainImplemented(GICDomain_RL), access to this field is RO.
Otherwise, access to this field is RES0 .

S_HPPI, bit [1]:

HPPI for Secure Interrupt Domain valid bit.

S_HPPI	Meaning
0b0	There is no HPPI of Sufficient priority for Secure Interrupt Domain.
0b1	There is an HPPI of Sufficient priority for Secure Interrupt Domain.

Accessing this field has the following behavior:

When IsGICDomainImplemented(GICDomain_S), access to this field is RO.
Otherwise, access to this field is RES0 .

NS_HPPI, bit [0]:

HPPI for Non-secure Interrupt Domain valid bit.

NS_HPPI	Meaning
0b0	There is no HPPI of Sufficient priority for Non-secure Interrupt Domain.
0b1	There is an HPPI of Sufficient priority for Non-secure Interrupt Domain.

Accessing this field has the following behavior:

When IsGICDomainImplemented(GICDomain_NS), access to this field is RO.
Otherwise, access to this field is RES0 .

Access Instructions

This register is Read-only.

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, ICC_DOMHPPIR_EL3

(op0 = 0b11, op1 = 0b110, CRn = 0b1100, CRm = 0b1000, op2 = 0b010)

if !(IsFeatureImplemented(FEAT_GCIE) && HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then Undefined(); elsif PSTATE.EL == EL2 then Undefined(); elsif PSTATE.EL == EL3 then X{64}(t) = ICC_DOMHPPIR_EL3(); end;

63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
RES0
RES0																												P_HPPI	RL_HPPI	S_HPPI	NS_HPPI

Configuration

Attributes

Field descriptions

Bits [63:4]:

P_HPPI, bit [3]:

RL_HPPI, bit [2]:

S_HPPI, bit [1]:

NS_HPPI, bit [0]:

Access Instructions