Instruction Cache Invalidate All to PoU, Inner Shareable
Invalidate all instruction caches in the Inner Shareable domain of the PE executing the instruction to the Point of Unification.
AArch64 System instruction IC IALLUIS performs the same function as AArch32 System instruction ICIALLUIS.
This instruction is present only when FEAT_AA64 is implemented. Otherwise, direct accesses to IC IALLUIS are UNDEFINED.
IC IALLUIS is a 64-bit System instruction.
This instruction has no applicable fields.
The value in the register specified by <Xt> is ignored.
The Rt field should be set to 0b11111. If the Rt field is not set to 0b11111, it is CONSTRAINED UNPREDICTABLE whether:
The instruction is UNDEFINED.
The instruction behaves as if the Rt field is set to 0b11111.
This system instruction is an alias of the SYS instruction.
Accesses to this instruction use the following encodings in the System instruction encoding space:
IC IALLUIS{, <Xt>}
(op0 = 0b01, op1 = 0b000, CRn = 0b0111, CRm = 0b0001, op2 = 0b000)
if !IsFeatureImplemented(FEAT_AA64) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if !AArch64_CanTrapIC(CacheType_Instruction, CacheOp_Invalidate, CacheOpScope_PoU) then ExecuteAsNOP(); elsif EL2Enabled() && HCR_EL2().TPU == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2().TICAB == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HFGITR_EL2().ICIALLUIS == '1' then AArch64_SystemAccessTrap(EL2, 0x18); else if AArch64_TreatICAsNOP(CacheType_Instruction, CacheOp_Invalidate, CacheOpScope_PoU) then ExecuteAsNOP(); else AArch64_IC(CacheOpScope_ALLUIS); end; end; elsif PSTATE.EL == EL2 then if !AArch64_CanTrapIC(CacheType_Instruction, CacheOp_Invalidate, CacheOpScope_PoU) then ExecuteAsNOP(); else if AArch64_TreatICAsNOP(CacheType_Instruction, CacheOp_Invalidate, CacheOpScope_PoU) then ExecuteAsNOP(); else AArch64_IC(CacheOpScope_ALLUIS); end; end; elsif PSTATE.EL == EL3 then if AArch64_TreatICAsNOP(CacheType_Instruction, CacheOp_Invalidate, CacheOpScope_PoU) then ExecuteAsNOP(); else AArch64_IC(CacheOpScope_ALLUIS); end; end;
Version 2026.06 — Copyright © 2010-2026 Arm Limited or its affiliates.
This site is provided as a community resource and is NOT affiliated with nor endorsed by Arm Limited.