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GMID_EL1

Multiple tag transfer ID Register

Indicates the block size that is accessed by the LDGM and STGM System instructions.

Configuration

This register is present only when FEAT_MTE2 is implemented. Otherwise, direct accesses to GMID_EL1 are UNDEFINED.

Attributes

GMID_EL1 is a 64-bit register.

Field descriptions

6362616059585756555453525150494847464544434241403938373635343332
313029282726252423222120191817161514131211109876543210
RES0
RES0BS

Bits [63:4]:

Reserved, RES0.

BS, bits [3:0]:

Log2 of the block size in words. The minimum supported size is 16B (value == 2) and the maximum is 256B (value == 6).

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Access Instructions

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, GMID_EL1

(op0 = 0b11, op1 = 0b001, CRn = 0b0000, CRm = 0b0000, op2 = 0b100)

if !IsFeatureImplemented(FEAT_MTE2) then UnimplementedIDRegister(); elsif HaveEL(EL3) && !(EffectivelyAtEL0InHost() || EffectivelyAtEL0NotInHost() || PSTATE.EL == EL3) && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_IDTE3) && SCR_EL3().TID5 == '1' then Undefined(); elsif PSTATE.EL == EL0 then if IsFeatureImplemented(FEAT_IDST) then AArch64_SystemAccessTraptoEL1orEL2(0x18); else Undefined(); end; elsif PSTATE.EL == EL1 then if EL2Enabled() && HCR_EL2().TID5 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_IDTE3) && SCR_EL3().TID5 == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = GMID_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && IsFeatureImplemented(FEAT_IDTE3) && SCR_EL3().TID5 == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = GMID_EL1(); end; elsif PSTATE.EL == EL3 then X{64}(t) = GMID_EL1(); end;


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