ERXGSR_EL1

Access Instructions

If ERRIDR_EL1.NUM is 0x0000 or ERRSELR_EL1.SEL is greater than or equal to ERRIDR_EL1.NUM, then one of the following occurs:

• An UNKNOWN group of error records are selected.
• ERXGSR_EL1 is RAZ.
• Direct reads of ERXGSR_EL1 are NOPs.
• Direct reads of ERXGSR_EL1 are UNDEFINED.

Accesses to this register use the following encodings in the System register encoding space:

(op0 = 0b11, op1 = 0b000, CRn = 0b0101, CRm = 0b0011, op2 = 0b010)

if !IsFeatureImplemented(FEAT_RASv2) then Undefined(); elsif HaveEL(EL3) && !(EffectivelyAtEL0InHost() || EffectivelyAtEL0NotInHost() || PSTATE.EL == EL3) && EL3SDDUndefPriority() && SCR_EL3().TERR == '1' then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && HCR_EL2().TERR == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT2) && ((HaveEL(EL3) && SCR_EL3().FGTEn2 == '0') || HFGRTR2_EL2().nERXGSR_EL1 == '0') then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = ERRGSR(UInt(ERRSELR_EL1().SEL[15:6])); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && SCR_EL3().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = ERRGSR(UInt(ERRSELR_EL1().SEL[15:6])); end; elsif PSTATE.EL == EL3 then X{64}(t) = ERRGSR(UInt(ERRSELR_EL1().SEL[15:6])); end;