DC IVAC

Executing DC IVAC

When the instruction is executed, it can generate a watchpoint, which is prioritized in the same way as other watchpoints. If a watchpoint is generated, the CM bit in the ESR_ELx.ISS field is set to 1.

This instruction requires write access permission to the VA, otherwise it generates a Permission fault, subject to the constraints described in 'MMU faults generated by cache maintenance operations'.

Execution of this instruction might require an address translation from VA to PA, and that translation might fault. For more information, see 'The data cache maintenance instruction (DC)'.

This system instruction is an alias of the SYS instruction.

Accesses to this instruction use the following encodings in the System instruction encoding space:

(op0 = 0b01, op1 = 0b000, CRn = 0b0111, CRm = 0b0110, op2 = 0b001)

if !IsFeatureImplemented(FEAT_AA64) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if !AArch64_CanTrapDC(CacheType_Data, CacheOp_Invalidate, CacheOpScope_PoC) then ExecuteAsNOP(); elsif EL2Enabled() && HCR_EL2().TPCP == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HFGITR_EL2().DCIVAC == '1' then AArch64_SystemAccessTrap(EL2, 0x18); else if AArch64_TreatDCAsNOP(CacheType_Data, CacheOp_Invalidate, CacheOpScope_PoC) then ExecuteAsNOP(); else AArch64_DC(X{64}(t), CacheType_Data, CacheOp_Invalidate, CacheOpScope_PoC); end; end; elsif PSTATE.EL == EL2 then if !AArch64_CanTrapDC(CacheType_Data, CacheOp_Invalidate, CacheOpScope_PoC) then ExecuteAsNOP(); else if AArch64_TreatDCAsNOP(CacheType_Data, CacheOp_Invalidate, CacheOpScope_PoC) then ExecuteAsNOP(); else AArch64_DC(X{64}(t), CacheType_Data, CacheOp_Invalidate, CacheOpScope_PoC); end; end; elsif PSTATE.EL == EL3 then if AArch64_TreatDCAsNOP(CacheType_Data, CacheOp_Invalidate, CacheOpScope_PoC) then ExecuteAsNOP(); else AArch64_DC(X{64}(t), CacheType_Data, CacheOp_Invalidate, CacheOpScope_PoC); end; end;