Interrupt Controller Empty List Register Status Register
Indicates which List registers contain valid interrupts.
AArch32 System register ICH_ELRSR bits [31:0] are architecturally mapped to AArch64 System register ICH_ELRSR_EL2[31:0].
This register is present only when FEAT_AA32EL2 is implemented, GICv3 is implemented, and (EL2 is implemented or EL3 is implemented). Otherwise, direct accesses to ICH_ELRSR are UNDEFINED.
If EL2 is not implemented, this register is RES0 from EL3.
ICH_ELRSR is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | Status15 | Status14 | Status13 | Status12 | Status11 | Status10 | Status9 | Status8 | Status7 | Status6 | Status5 | Status4 | Status3 | Status2 | Status1 | Status0 | |||||||||||||||
Reserved, RES0.
Status bit for List register <n>, ICH_LR<n>:
| Status<n> | Meaning |
|---|---|
| 0b0 |
List register ICH_LR<n>, if implemented, contains a valid interrupt. Using this List register can result in overwriting a valid interrupt. |
| 0b1 |
List register ICH_LR<n> does not contain a valid interrupt. The List register is empty and can be used without overwriting a valid interrupt or losing an EOI maintenance interrupt. |
For any List register <n>, the corresponding status bit is set to 1 if ICH_LRC<n>.State is 0b00 and either ICH_LRC<n>.HW is 1 or ICH_LRC<n>.EOI (bit [9]) is 0.
Accesses to this register use the following encodings in the System register encoding space:
MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
(coproc = 0b1111, opc1 = 0b100, CRn = 0b1100, CRm = 0b1011, opc2 = 0b101)
if !(IsFeatureImplemented(FEAT_AA32EL2) && IsFeatureImplemented(FEAT_GICv3) && (HaveEL(EL2) || HaveEL(EL3))) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HSTR_EL2().T12 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HSTR().T12 == '1' then AArch32_TakeHypTrapException(0x03); else Undefined(); end; elsif PSTATE.EL == EL2 then if ICC_HSRE().SRE == '0' then Undefined(); else R(t) = ICH_ELRSR(); end; elsif PSTATE.EL == EL3 then if ICC_MSRE().SRE == '0' then Undefined(); else R(t) = ICH_ELRSR(); end; end;
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