Selected Error Record Primary Status Register
Accesses bits [31:0] of ERR<n>STATUS for the error record selected by ERRSELR.SEL.
AArch32 System register ERXSTATUS bits [31:0] are architecturally mapped to AArch64 System register ERXSTATUS_EL1[31:0].
This register is present only when FEAT_RAS is implemented and FEAT_AA32EL1 is implemented. Otherwise, direct accesses to ERXSTATUS are UNDEFINED.
ERXSTATUS is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| ERRnSTATUSlo | |||||||||||||||||||||||||||||||
ERXSTATUS accesses bits [31:0] of ERR<n>STATUS, where n is the value in ERRSELR.SEL.
If ERRIDR.NUM == 0 or ERRSELR.SEL is set to a value greater than or equal to ERRIDR.NUM, then one of the following occurs:
An UNKNOWN record is selected.
ERXSTATUS is RAZ/WI.
Direct reads and writes of ERXSTATUS are NOPs.
Direct reads and writes of ERXSTATUS are UNDEFINED.
Accesses to this register use the following encodings in the System register encoding space:
MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
(coproc = 0b1111, opc1 = 0b000, CRn = 0b0101, CRm = 0b0100, opc2 = 0b010)
if !(IsFeatureImplemented(FEAT_RAS) && IsFeatureImplemented(FEAT_AA32EL1)) then Undefined(); elsif HaveEL(EL3) && PSTATE.EL IN {EL1, EL2} && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && SCR_EL3().TERR == '1' then Undefined(); elsif HaveEL(EL3) && PSTATE.EL IN {EL1, EL2} && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) && SCR().TERR == '1' then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HSTR_EL2().T5 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HSTR().T5 == '1' then AArch32_TakeHypTrapException(0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HCR_EL2().TERR == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HCR2().TERR == '1' then AArch32_TakeHypTrapException(0x03); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && SCR_EL3().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) && PSTATE.M != M32_Monitor && SCR().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch32_TakeMonitorTrapException(); end; else R(t) = ERRSTATUS(UInt(ERRSELR().SEL))[31:0]; end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && SCR_EL3().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) && SCR().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch32_TakeMonitorTrapException(); end; else R(t) = ERRSTATUS(UInt(ERRSELR().SEL))[31:0]; end; elsif PSTATE.EL == EL3 then if PSTATE.M != M32_Monitor && SCR().TERR == '1' then AArch32_TakeMonitorTrapException(); else R(t) = ERRSTATUS(UInt(ERRSELR().SEL))[31:0]; end; end;
MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
(coproc = 0b1111, opc1 = 0b000, CRn = 0b0101, CRm = 0b0100, opc2 = 0b010)
if !(IsFeatureImplemented(FEAT_RAS) && IsFeatureImplemented(FEAT_AA32EL1)) then Undefined(); elsif HaveEL(EL3) && PSTATE.EL IN {EL1, EL2} && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && SCR_EL3().TERR == '1' then Undefined(); elsif HaveEL(EL3) && PSTATE.EL IN {EL1, EL2} && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && SCR_EL3().TWERR == '1' then Undefined(); elsif HaveEL(EL3) && PSTATE.EL IN {EL1, EL2} && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) && SCR().TERR == '1' then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HSTR_EL2().T5 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HSTR().T5 == '1' then AArch32_TakeHypTrapException(0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HCR_EL2().TERR == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HCR2().TERR == '1' then AArch32_TakeHypTrapException(0x03); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && SCR_EL3().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && SCR_EL3().TWERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) && PSTATE.M != M32_Monitor && SCR().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch32_TakeMonitorTrapException(); end; else ERRSTATUS(UInt(ERRSELR().SEL))[31:0] = R(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && SCR_EL3().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && SCR_EL3().TWERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) && SCR().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch32_TakeMonitorTrapException(); end; else ERRSTATUS(UInt(ERRSELR().SEL))[31:0] = R(t); end; elsif PSTATE.EL == EL3 then if PSTATE.M != M32_Monitor && SCR().TERR == '1' then AArch32_TakeMonitorTrapException(); else ERRSTATUS(UInt(ERRSELR().SEL))[31:0] = R(t); end; end;
Version 2026.06 — Copyright © 2010-2026 Arm Limited or its affiliates.
This site is provided as a community resource and is NOT affiliated with nor endorsed by Arm Limited.