Data Fault Address Register
Holds the virtual address of the faulting address that caused a synchronous Data Abort exception.
This register is banked between DFAR and DFAR_S and DFAR_NS.
AArch32 System register DFAR bits [31:0] are architecturally mapped to AArch64 System register FAR_EL1[31:0].
AArch32 System register DFAR bits [31:0] (DFAR_S) are architecturally mapped to AArch32 System register HDFAR[31:0] when FEAT_AA32EL2 is implemented and FEAT_AA32EL3 is implemented.
This register is present only when FEAT_AA32EL1 is implemented. Otherwise, direct accesses to DFAR are UNDEFINED.
DFAR is a 32-bit register.
This register has the following instances:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| VA | |||||||||||||||||||||||||||||||
VA of faulting address of synchronous Data Abort exception.
The reset behavior of this field is:
Accesses to this register use the following encodings in the System register encoding space:
MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
(coproc = 0b1111, opc1 = 0b000, CRn = 0b0110, CRm = 0b0000, opc2 = 0b000)
if !IsFeatureImplemented(FEAT_AA32EL1) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HSTR_EL2().T6 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HSTR().T6 == '1' then AArch32_TakeHypTrapException(0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HCR_EL2().TRVM == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HCR().TRVM == '1' then AArch32_TakeHypTrapException(0x03); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) then R(t) = DFAR_NS(); else R(t) = DFAR(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) then R(t) = DFAR_NS(); else R(t) = DFAR(); end; elsif PSTATE.EL == EL3 then if SCR().NS == '0' then R(t) = DFAR_S(); else R(t) = DFAR_NS(); end; end;
MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
(coproc = 0b1111, opc1 = 0b000, CRn = 0b0110, CRm = 0b0000, opc2 = 0b000)
if !IsFeatureImplemented(FEAT_AA32EL1) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HSTR_EL2().T6 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HSTR().T6 == '1' then AArch32_TakeHypTrapException(0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HCR_EL2().TVM == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HCR().TVM == '1' then AArch32_TakeHypTrapException(0x03); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) then DFAR_NS() = R(t); else DFAR() = R(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) then DFAR_NS() = R(t); else DFAR() = R(t); end; elsif PSTATE.EL == EL3 then if SCR().NS == '0' then DFAR_S() = R(t); else DFAR_NS() = R(t); end; end;
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