Move and zero two ZA single-vector groups to Z two-vector operand
This instruction operates on two ZA single-vector groups. The ZA single-vector groups are zeroed after moving their contents to the destination vectors.
The single-vector group within each half of the ZA array is selected by the sum of the vector select register and offset, modulo half the number of ZA array vectors.
The vector group symbol VGx2 indicates that the instruction operates on two ZA single-vector groups.
The preferred disassembly syntax uses a 64-bit element size, but an assembler should accept any element size if it is used consistently for all operands. The vector group symbol is preferred for disassembly, but optional in assembler source code.
This instruction is unpredicated.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | Rv | 0 | 1 | 0 | 1 | 0 | off3 | Zd | 0 | ||||||
if !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); constant integer v = UInt('010':Rv); constant integer offset = UInt(off3); constant integer d = UInt(Zd:'0'); constant integer nreg = 2;
| <Zd1> |
Is the name of the first scalable vector register of the destination multi-vector group, encoded as "Zd" times 2. |
| <Zd2> |
Is the name of the second scalable vector register of the destination multi-vector group, encoded as "Zd" times 2 plus 1. |
| <Wv> |
Is the 32-bit name of the vector select register W8-W11, encoded in the "Rv" field. |
| <offs> |
Is the vector select offset, in the range 0 to 7, encoded in the "off3" field. |
CheckStreamingSVEAndZAEnabled(); constant integer VL = CurrentVL; constant integer vectors = VL DIV 8; constant integer vstride = vectors DIV nreg; constant bits(32) vbase = X[v, 32]; integer vec = (UInt(vbase) + offset) MOD vstride; for r = 0 to nreg-1 constant bits(VL) result = ZAvector[vec, VL]; ZAvector[vec, VL] = Zeros(VL); Z[d + r, VL] = result; vec = vec + vstride;
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
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