LDNT1B (scalar plus scalar, single register)

This instruction performs a contiguous non-temporal load of bytes to elements of a vector register from the memory address generated by a 64-bit scalar base and scalar index that is added to the base address. After each element access the index value is incremented, but the index register is not updated. Inactive elements will not cause a read from Device memory or signal a fault, and are set to zero in the destination vector.

A non-temporal load is a hint to the system that this data is unlikely to be referenced again soon.

SVE class

(FEAT_SVE || FEAT_SME)

Decode

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); if Rm == '11111' then EndOfDecode(Decode_UNDEF); constant integer t = UInt(Zt); constant integer n = UInt(Rn); constant integer m = UInt(Rm); constant integer g = UInt(Pg); constant integer esize = 8;

Assembler Symbols

<Zt>	Is the name of the scalable vector register to be transferred, encoded in the "Zt" field.

<Pg>	Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.

<Xn|SP>

Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.

<Xm>	Is the 64-bit name of the general-purpose offset register, encoded in the "Rm" field.

Operation

CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV esize; bits(64) base; bits(64) offset; constant bits(PL) mask = P[g, PL]; bits(64) addr; bits(VL) result; constant integer mbytes = esize DIV 8; constant boolean contiguous = TRUE; constant boolean nontemporal = TRUE; constant boolean predicated = TRUE; constant boolean tagchecked = TRUE; constant AccessDescriptor accdesc = CreateAccDescSVE(MemOp_LOAD, nontemporal, contiguous, predicated, tagchecked); if !AnyActiveElement(mask, esize) then if n == 31 && ConstrainUnpredictableBool(Unpredictable_CHECKSPNONEACTIVE) then CheckSPAlignment(); else if n == 31 then CheckSPAlignment(); base = if n == 31 then SP[64] else X[n, 64]; offset = X[m, 64]; addr = AddressAdd(base, UInt(offset) * mbytes, accdesc); for e = 0 to elements-1 if ActivePredicateElement(mask, e, esize) then Elem[result, e, esize] = Mem[addr, mbytes, accdesc]; else Elem[result, e, esize] = Zeros(esize); addr = AddressIncrement(addr, mbytes, accdesc); Z[t, VL] = result;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	1	0	0	1	0	0	0	0	0	!= 11111					1	1	0	Pg			Rn					Zt
							msz				Rm