Generic Interrupt Controller with result
This instruction acknowledges interrupts when FEAT_GCIE is implemented.
This is an alias of SYSL. This means:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | op2 | Rt | ||||||
| L | op1 | CRn | CRm | ||||||||||||||||||||||||||||
is equivalent to
SYSL <Xt>, #0, C12, C3, #<op2>
and is the preferred disassembly when SysLOp('000', '1100', '0011', op2) == Sysl_GICR.
| <Xt> |
Is the 64-bit name of the general-purpose destination register, encoded in the "Rt" field. |
| <gicr_op> |
Is a GICR operation name, as listed for the GICR system instruction group,
encoded in
|
The description of SYSL gives the operational pseudocode for this instruction.
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