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FTMAD

Floating-point trigonometric multiply-add coefficient

This instruction multiplies each element of the first source vector by the absolute value of the corresponding element of the second source vector and performs a fused addition of each product with a value obtained from a table of hard-wired coefficients, and destructively places the results in the first source vector. This instruction is unpredicated.

The coefficients are selected by a combination of the sign bit in the second source element and an immediate index in the range 0 to 7.

FTMAD can be combined with FTSMUL and FTSSEL to calculate values for sin(x) and cos(x). For more information, see FTSMUL. The coefficients are intended to provide accurate results for FTSMUL inputs in the range -π/4 < x ≤ π/4.

For double-precision operations, the coefficients are:

element2<63> Index Hexadecimal Approximate value
0 0 0x3FF0000000000000 1
0 1 0xBFC5555555555543 -1/3!
0 2 0x3F8111111110F30C 1/5!
0 3 0xBF2A01A019B92FC6 -1/7!
0 4 0x3EC71DE351F3D22B 1/9!
0 5 0xBE5AE5E2B60F7B91 -1/11!
0 6 0x3DE5D8408868552F 1/13!
0 7 0x0000000000000000 0
1 0 0x3FF0000000000000 1
1 1 0xBFE0000000000000 -1/2!
1 2 0x3FA5555555555536 1/4!
1 3 0xBF56C16C16C13A0B -1/6!
1 4 0x3EFA01A019B1E8D8 1/8!
1 5 0xBE927E4F7282F468 -1/10!
1 6 0x3E21EE96D2641B13 1/12!
1 7 0xBDA8F76380FBB401 -1/14!

For single-precision operations, the coefficients are:

element2<63> Index Hexadecimal Approximate value
0 0 0x3F800000 1
0 1 0xBE2AAAAB -1/3!
0 2 0x3C088886 1/5!
0 3 0xB95008B9 -1/7!
0 4 0x36369D6D 1/9!
0 5 0x00000000 0
0 6 0x00000000 0
0 7 0x00000000 0
1 0 0x3F800000 1
1 1 0xBF000000 -1/2!
1 2 0x3D2AAAA6 1/4!
1 3 0xBAB60705 -1/6!
1 4 0x37CD37CC 1/8!
1 5 0x00000000 0
1 6 0x00000000 0
1 7 0x00000000 0

For half-precision operations, the coefficients are:

element2<63> Index Hexadecimal Approximate value
0 0 0x3C00 1
0 1 0xB155 -1/3!
0 2 0x2030 1/5!
0 3 0x0000 0
0 4 0x0000 0
0 5 0x0000 0
0 6 0x0000 0
0 7 0x0000 0
1 0 0x3C00 1
1 1 0xB800 -1/2!
1 2 0x293A 1/4!
1 3 0x0000 0
1 4 0x0000 0
1 5 0x0000 0
1 6 0x0000 0
1 7 0x0000 0

This instruction is illegal when executed in Streaming SVE mode, unless FEAT_SME_FA64 is implemented and enabled.

SVE class

(FEAT_SVE)

313029282726252423222120191817161514131211109876543210
01100101size010imm3100000ZmZdn

Encoding

FTMAD <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T>, #<imm>

Decode

if !IsFeatureImplemented(FEAT_SVE) then EndOfDecode(Decode_UNDEF); end; if size == '00' then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let dn : integer = UInt(Zdn); let m : integer = UInt(Zm); let imm : integer = UInt(imm3);

Assembler Symbols

<Zdn>

Is the name of the first source and destination scalable vector register, encoded in the "Zdn" field.

<T>

Is the size specifier, encoded in size:

size <T>
00 RESERVED
01 H
10 S
11 D
<Zm>

Is the name of the second source scalable vector register, encoded in the "Zm" field.

<imm>

Is the unsigned immediate operand, in the range 0 to 7, encoded in the "imm3" field.

Operation

CheckNonStreamingSVEEnabled(); let VL : integer{} = CurrentVL(); let elements : integer = VL DIV esize; let operand1 : bits(VL) = Z{}(dn); let operand2 : bits(VL) = Z{}(m); var result : bits(VL); for e = 0 to elements-1 do let element1 : bits(esize) = operand1[e*:esize]; let element2 : bits(esize) = operand2[e*:esize]; result[e*:esize] = FPTrigMAdd{esize}(imm, element1, element2, FPCR()); end; Z{VL}(dn) = result;

Operational information

This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is CONSTRAINED UNPREDICTABLE:

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