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CMP<cc> (vectors)

Compare vectors

This instruction compares active integer elements in the first source vector with the corresponding elements in the second source vector, and places the boolean results of the specified comparison in the corresponding elements of the destination predicate. Inactive elements in the destination predicate register are set to zero. This instruction sets the First (N), None (Z), and !Last (C) condition flags based on the predicate result, and sets the V flag to zero.

<cc> Comparison
EQ equal
GE signed greater than or equal
GT signed greater than
HI unsigned higher than
HS unsigned higher than or same
NE not equal

This instruction is used by the pseudo-instructions CMPLE (vectors), CMPLO (vectors), CMPLS (vectors), and CMPLT (vectors).

It has encodings from 6 classes: Equal , Greater than , Greater than or equal , Higher , Higher or same and Not equal

Equal class

(FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
00100100size0Zm101PgZn0Pd
opo2ne

Encoding

CMPEQ <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T>

Decode

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer d = UInt(Pd); constant CmpOp cmp_op = Cmp_EQ; constant boolean unsigned = FALSE;

Greater than class

(FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
00100100size0Zm100PgZn1Pd
opo2ne

Encoding

CMPGT <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T>

Decode

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer d = UInt(Pd); constant CmpOp cmp_op = Cmp_GT; constant boolean unsigned = FALSE;

Greater than or equal class

(FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
00100100size0Zm100PgZn0Pd
opo2ne

Encoding

CMPGE <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T>

Decode

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer d = UInt(Pd); constant CmpOp cmp_op = Cmp_GE; constant boolean unsigned = FALSE;

Higher class

(FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
00100100size0Zm000PgZn1Pd
opo2ne

Encoding

CMPHI <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T>

Decode

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer d = UInt(Pd); constant CmpOp cmp_op = Cmp_GT; constant boolean unsigned = TRUE;

Higher or same class

(FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
00100100size0Zm000PgZn0Pd
opo2ne

Encoding

CMPHS <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T>

Decode

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer d = UInt(Pd); constant CmpOp cmp_op = Cmp_GE; constant boolean unsigned = TRUE;

Not equal class

(FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
00100100size0Zm101PgZn1Pd
opo2ne

Encoding

CMPNE <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T>

Decode

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer d = UInt(Pd); constant CmpOp cmp_op = Cmp_NE; constant boolean unsigned = FALSE;

Assembler Symbols

<Pd>

Is the name of the destination scalable predicate register, encoded in the "Pd" field.

<T>

Is the size specifier, encoded in size:

size <T>
00 B
01 H
10 S
11 D
<Pg>

Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.

<Zn>

Is the name of the first source scalable vector register, encoded in the "Zn" field.

<Zm>

Is the name of the second source scalable vector register, encoded in the "Zm" field.

Operation

CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV esize; constant bits(PL) mask = P[g, PL]; constant bits(VL) operand1 = if AnyActiveElement(mask, esize) then Z[n, VL] else Zeros(VL); constant bits(VL) operand2 = if AnyActiveElement(mask, esize) then Z[m, VL] else Zeros(VL); bits(PL) result; constant integer psize = esize DIV 8; for e = 0 to elements-1 constant bits(esize) op1elt = Elem[operand1, e, esize]; constant integer element1 = if unsigned then UInt(op1elt) else SInt(op1elt); if ActivePredicateElement(mask, e, esize) then boolean cond; constant bits(esize) op2elt = Elem[operand2, e, esize]; constant integer element2 = if unsigned then UInt(op2elt) else SInt(op2elt); case cmp_op of when Cmp_EQ cond = element1 == element2; when Cmp_NE cond = element1 != element2; when Cmp_GE cond = element1 >= element2; when Cmp_LT cond = element1 < element2; when Cmp_GT cond = element1 > element2; when Cmp_LE cond = element1 <= element2; constant bit pbit = if cond then '1' else '0'; Elem[result, e, psize] = ZeroExtend(pbit, psize); else Elem[result, e, psize] = ZeroExtend('0', psize); PSTATE.<N,Z,C,V> = PredTest(mask, result, esize); P[d, PL] = result;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.

If FEAT_SME is implemented and the PE is in Streaming SVE mode, then any subsequent instruction which is dependent on the predicate register or NZCV condition flags written by this instruction might be significantly delayed.

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