Conditionally extract element after last to general-purpose register
This instruction extracts and zero-extends the element after the Last active element, or if the Last active element is the final element it extracts element zero, from the source vector register, and destructively places the zero-extended value in the destination and first source general-purpose register. If there are no Active elements, the least significant element-size bits of the destination and first source general-purpose register are destructively zero-extended.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | size | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | Pg | Zm | Rdn | |||||||||||
| B | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let g : integer = UInt(Pg); let dn : integer = UInt(Rdn); let m : integer = UInt(Zm); let csize : integer{} = if esize < 64 then 32 else 64; let isBefore : boolean = FALSE;
| <R> |
Is a width specifier,
encoded in
|
| <dn> |
Is the number [0-30] of the source and destination general-purpose register or the name ZR (31), encoded in the "Rdn" field. |
| <Pg> |
Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. |
| <Zm> |
Is the name of the source scalable vector register, encoded in the "Zm" field. |
| <T> |
Is the size specifier,
encoded in
|
CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let elements : integer = VL DIV esize; let mask : bits(PL) = P{}(g); let operand1 : bits(esize) = X{}(dn); let operand2 : bits(VL) = Z{}(m); var result : bits(csize); var last : integer = LastActiveElement{PL}(mask, esize); if last < 0 then result = ZeroExtend{csize}(operand1); else if !isBefore then last = last + 1; if last >= elements then last = 0; end; end; result = ZeroExtend{csize}(operand2[last*:esize]); end; X{csize}(dn) = result;
If FEAT_SME is implemented and the PE is in Streaming SVE mode, then any subsequent instruction that is dependent on the general-purpose register written by this instruction might be significantly delayed.
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