CFLTZ

Compare and fault on zero

This instruction generates a Conditional fault exception if the register value is zero. If an exception is generated, the <reason> operand is copied to ESR_ELx.

This instruction does not affect the condition flags.

This is a pseudo-instruction of CFLT<cc> (immediate). This means:

The encodings in this description are named to match the encodings of CFLT<cc> (immediate).
The assembler syntax is used only for assembly, and is not used on disassembly.
The description of CFLT<cc> (immediate) gives the operational pseudocode, any constrained unpredictable behavior, and any operational information for this instruction.

Fault class

(FEAT_CFLT)

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
sf	1	1	1	0	1	1	0	1	0	0	0	0	0	0	0	0	0	0	0	imm2		0	0	0	0	0	Rt
								cc			imm9h												imm9l

32-bit equal encoding

(sf == 0)

CFLTZ #<reason>, <Wt>

is equivalent to

CFLTEQ #<reason>, <Wt>, #0

64-bit equal encoding

(sf == 1)

CFLTZ #<reason>, <Xt>

is equivalent to

CFLTEQ #<reason>, <Xt>, #0

Assembler Symbols

Is a 2-bit unsigned immediate, in the range 0 to 3, encoded in the "imm2" field.

<Wt>	Is the 32-bit name of the general-purpose register to be tested, encoded in the "Rt" field.

<Xt>	Is the 64-bit name of the general-purpose register to be tested, encoded in the "Rt" field.

Operation

The description of CFLT<cc> (immediate) gives the operational pseudocode for this instruction.