CFLT<cc> (register)

Compare registers and fault

This instruction compares the values in two registers, and generates a Conditional fault exception if the condition is true. This instruction does not affect the condition flags.

This instruction is used by the pseudo-instructions CFLTLE (register), CFLTLO (register), CFLTLS (register), and CFLTLT (register).

Fault class

(FEAT_CFLT)

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
sf	1	1	1	0	1	1	0	cc			Rm					0	0	0	0	imm2		1	0	0	0	0	Rt

32-bit greater than encoding

(sf == 0 && cc == 000)

CFLTGT #<reason>, <Wt|WSP>, <Wm|WSP>

32-bit greater than or equal encoding

(sf == 0 && cc == 001)

CFLTGE #<reason>, <Wt|WSP>, <Wm|WSP>

32-bit higher encoding

(sf == 0 && cc == 010)

CFLTHI #<reason>, <Wt|WSP>, <Wm|WSP>

32-bit higher or same encoding

(sf == 0 && cc == 011)

CFLTHS #<reason>, <Wt|WSP>, <Wm|WSP>

32-bit equal encoding

(sf == 0 && cc == 110)

CFLTEQ #<reason>, <Wt|WSP>, <Wm|WSP>

32-bit not equal encoding

(sf == 0 && cc == 111)

CFLTNE #<reason>, <Wt|WSP>, <Wm|WSP>

64-bit greater than encoding

(sf == 1 && cc == 000)

CFLTGT #<reason>, <Xt|SP>, <Xm|SP>

64-bit greater than or equal encoding

(sf == 1 && cc == 001)

CFLTGE #<reason>, <Xt|SP>, <Xm|SP>

64-bit higher encoding

(sf == 1 && cc == 010)

CFLTHI #<reason>, <Xt|SP>, <Xm|SP>

64-bit higher or same encoding

(sf == 1 && cc == 011)

CFLTHS #<reason>, <Xt|SP>, <Xm|SP>

64-bit equal encoding

(sf == 1 && cc == 110)

CFLTEQ #<reason>, <Xt|SP>, <Xm|SP>

64-bit not equal encoding

(sf == 1 && cc == 111)

CFLTNE #<reason>, <Xt|SP>, <Xm|SP>

Decode (all encodings)

if !IsFeatureImplemented(FEAT_CFLT) then EndOfDecode(Decode_UNDEF); end; let datasize : integer{} = 32 << UInt(sf); let t : integer = UInt(Rt); let m : integer = UInt(Rm); let reason : bits(16) = ZeroExtend{}(imm2); var cmp : CmpOp; var unsigned : boolean; case cc of when '000' => cmp = Cmp_GT; unsigned = FALSE; when '001' => cmp = Cmp_GE; unsigned = FALSE; when '010' => cmp = Cmp_GT; unsigned = TRUE; when '011' => cmp = Cmp_GE; unsigned = TRUE; when '110' => cmp = Cmp_EQ; unsigned = TRUE; when '111' => cmp = Cmp_NE; unsigned = TRUE; otherwise => EndOfDecode(Decode_UNDEF); end;

Assembler Symbols

Is a 2-bit unsigned immediate, in the range 0 to 3, encoded in the "imm2" field.

<Wt|WSP>

Is the 32-bit name of the general-purpose register or stack pointer to be tested, encoded in the "Rt" field.

<Wm|WSP>

Is the 32-bit name of the second general-purpose source register or stack pointer, encoded in the "Rm" field.

<Xt|SP>

Is the 64-bit name of the general-purpose register or stack pointer to be tested, encoded in the "Rt" field.

<Xm|SP>

Is the 64-bit name of the second general-purpose source register or stack pointer, encoded in the "Rm" field.

Operation

CheckCFLTEnabled(); let operand1 : bits(datasize) = if t == 31 then SP{datasize}() else X{datasize}(t); let operand2 : bits(datasize) = if m == 31 then SP{datasize}() else X{datasize}(m); var cond : boolean; let value1 : integer = if unsigned then UInt(operand1) else SInt(operand1); let value2 : integer = if unsigned then UInt(operand2) else SInt(operand2); case cmp of when Cmp_EQ => cond = value1 == value2; when Cmp_NE => cond = value1 != value2; when Cmp_GT => cond = value1 > value2; when Cmp_GE => cond = value1 >= value2; end; if cond then let isflt : boolean = FALSE; AArch64_ConditionalFault(isflt, reason); end;

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