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PMCID2SR: CONTEXTIDR_EL2 Sample Register

Purpose

Contains the sampled value of CONTEXTIDR_EL2, captured on reading PMU.PMPCSR[31:0].

Configuration

This register is present only when FEAT_PMUv3_EXT32 is implemented. Otherwise, direct accesses to PMCID2SR are RES0.

If FEAT_PMUv3_EXT64 is implemented, the same content is present in the same location, and can be accessed using PMCCIDSR[63:32].

PMCIDR2SR is in the Core power domain.

Note

If FEAT_PCSRv8p2 is not implemented, the PC Sample-based Profiling Extension can be implemented in the external debug register space, as indicated by the value of EDDEVID.PCSample.

Attributes

PMCID2SR is a 32-bit register.

This register is part of the PMU block.

Field descriptions

313029282726252423222120191817161514131211109876543210
CONTEXTIDR_EL2

CONTEXTIDR_EL2, bits [31:0]

Context ID. The value of CONTEXTIDR_EL2 that is associated with the most recent PMU.PMPCSR sample. When the most recent PMU.PMPCSR sample is generated:

Because the value written to this field is an indirect read of CONTEXTIDR_EL2, it is CONSTRAINED UNPREDICTABLE whether this field is set to the original or new value if PMU.PMPCSR samples:

The reset behavior of this field is:

Accessing PMCID2SR

IMPLEMENTATION DEFINED extensions to external debug might make the value of this register UNKNOWN, see 'Permitted behavior that might make the PC Sample-based profiling registers UNKNOWN'.

Accesses to this register use the following encodings:

Accessible at offset 0x22C from PMU