← Home

TRCVIIECTLR: Trace ViewInst Include/Exclude Control Register

Purpose

Use this to select, or read, the Address Range Comparators for the ViewInst include/exclude function.

Configuration

External register TRCVIIECTLR bits [31:0] are architecturally mapped to AArch64 System register TRCVIIECTLR[31:0].

This register is present only when FEAT_ETE is implemented, FEAT_TRC_EXT is implemented and UInt(TRCIDR4.NUMACPAIRS) > 0. Otherwise, direct accesses to TRCVIIECTLR are RES0.

Attributes

TRCVIIECTLR is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0EXCLUDE[7]EXCLUDE[6]EXCLUDE[5]EXCLUDE[4]EXCLUDE[3]EXCLUDE[2]EXCLUDE[1]EXCLUDE[0]RES0INCLUDE[7]INCLUDE[6]INCLUDE[5]INCLUDE[4]INCLUDE[3]INCLUDE[2]INCLUDE[1]INCLUDE[0]

Bits [31:24]

Reserved, RES0.

EXCLUDE[<m>], bit [m+16], for m = 7 to 0

Exclude Address Range Comparator <m>. Selects whether Address Range Comparator <m> is in use with the ViewInst exclude function.

EXCLUDE[<m>]Meaning
0b0

The address range that Address Range Comparator <m> defines, is not selected for the ViewInst exclude function.

0b1

The address range that Address Range Comparator <m> defines, is selected for the ViewInst exclude function.

The reset behavior of this field is:

Accessing this field has the following behavior:

Bits [15:8]

Reserved, RES0.

INCLUDE[<m>], bit [m], for m = 7 to 0

Include Address Range Comparator <m>.

Selects whether Address Range Comparator <m> is in use with the ViewInst include function.

Selecting no comparators for the ViewInst include function indicates that all instructions are included by default.

The ViewInst exclude function then indicates which ranges are excluded.

INCLUDE[<m>]Meaning
0b0

The address range that Address Range Comparator <m> defines, is not selected for the ViewInst include function.

0b1

The address range that Address Range Comparator <m> defines, is selected for the ViewInst include function.

The reset behavior of this field is:

Accessing this field has the following behavior:

Accessing TRCVIIECTLR

Must be programmed if TRCIDR4.NUMACPAIRS > 0b0000.

Writes are CONSTRAINED UNPREDICTABLE if the trace unit is not in the Idle state.

TRCVIIECTLR can be accessed through the external debug interface:

ComponentOffsetInstance
ETE0x084TRCVIIECTLR

This interface is accessible as follows: