Controls how often trace protocol synchronization requests occur.
External register TRCSYNCPR bits [31:0] are architecturally mapped to AArch64 System register TRCSYNCPR[31:0].
This register is present only when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented. Otherwise, direct accesses to TRCSYNCPR are RES0.
TRCSYNCPR is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | PERIOD | ||||||||||||||||||||||||||||||
Reserved, RES0.
Defines the number of bytes of trace between each periodic trace protocol synchronization request.
| PERIOD | Meaning |
|---|---|
| 0b00000 |
Trace protocol synchronization is disabled. |
| 0b01000 |
Trace protocol synchronization request occurs after 28 bytes of trace. |
| 0b01001 |
Trace protocol synchronization request occurs after 29 bytes of trace. |
| 0b01010 |
Trace protocol synchronization request occurs after 210 bytes of trace. |
| 0b01011 |
Trace protocol synchronization request occurs after 211 bytes of trace. |
| 0b01100 |
Trace protocol synchronization request occurs after 212 bytes of trace. |
| 0b01101 |
Trace protocol synchronization request occurs after 213 bytes of trace. |
| 0b01110 |
Trace protocol synchronization request occurs after 214 bytes of trace. |
| 0b01111 |
Trace protocol synchronization request occurs after 215 bytes of trace. |
| 0b10000 |
Trace protocol synchronization request occurs after 216 bytes of trace. |
| 0b10001 |
Trace protocol synchronization request occurs after 217 bytes of trace. |
| 0b10010 |
Trace protocol synchronization request occurs after 218 bytes of trace. |
| 0b10011 |
Trace protocol synchronization request occurs after 219 bytes of trace. |
| 0b10100 |
Trace protocol synchronization request occurs after 220 bytes of trace. |
Other values are reserved. If a reserved value is programmed into PERIOD, then the behavior of the synchronization period counter is CONSTRAINED UNPREDICTABLE and one of the following behaviors occurs:
The reset behavior of this field is:
Must be programmed if TRCIDR3.SYNCPR == 0.
Writes are CONSTRAINED UNPREDICTABLE if the trace unit is not in the Idle state.
| Component | Offset | Instance |
|---|---|---|
| ETE | 0x034 | TRCSYNCPR |
This interface is accessible as follows: