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TRCPRGCTLR: Trace Programming Control Register

Purpose

Enables the trace unit.

Configuration

External register TRCPRGCTLR bits [31:0] are architecturally mapped to AArch64 System register TRCPRGCTLR[31:0].

This register is present only when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented. Otherwise, direct accesses to TRCPRGCTLR are RES0.

Attributes

TRCPRGCTLR is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0EN

Bits [31:1]

Reserved, RES0.

EN, bit [0]

Trace unit enable.

ENMeaning
0b0

The trace unit is disabled.

0b1

The trace unit is enabled.

The reset behavior of this field is:

Accessing TRCPRGCTLR

Must be programmed.

TRCPRGCTLR can be accessed through the external debug interface:

ComponentOffsetInstance
ETE0x004TRCPRGCTLR

This interface is accessible as follows: