Generates one of the errors enabled in the corresponding ERR<n>PFGCTL register.
This register is present only when error record n is implemented, the node that owns error record n implements the Common Fault Injection Model Extension and error record n is the first error record in the node. Otherwise, direct accesses to ERR<n>PFGCDN are RES0.
ERR<n>FR describes the features implemented by the node.
ERR<n>PFGCDN is a 64-bit register.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | |||||||||||||||||||||||||||||||
CDN |
Reserved, RES0.
Countdown value.
This field is copied to Error Generation Counter when either:
While ERR<n>PFGCTL.CDNEN is 1 and the Error Generation Counter is nonzero, the counter decrements by 1 for each cycle at an IMPLEMENTATION DEFINED clock rate. When the counter reaches zero, one of the errors enabled in the ERR<n>PFGCTL register is generated.
The current Error Generation Counter value is not visible to software.
The reset behavior of this field is:
Component | Offset | Instance |
---|---|---|
RAS | 0x810 + (64 * n) | ERR<n>PFGCDN |
Accesses on this interface are RW.