Holds a virtual address, or a VMID and/or a context ID, for use in breakpoint matching. Forms breakpoint n together with control register DBGBCR<n>_EL1.
External register DBGBVR<n>_EL1 bits [63:0] are architecturally mapped to AArch64 System register DBGBVR<n>_EL1[63:0].
External register DBGBVR<n>_EL1 bits [31:0] are architecturally mapped to AArch32 System register DBGBVR<n>[31:0].
External register DBGBVR<n>_EL1 bits [63:32] are architecturally mapped to AArch32 System register DBGBXVR<n>[31:0].
DBGBVR<n>_EL1 is in the Core power domain.
How this register is interpreted depends on the value of DBGBCR<n>_EL1.BT.
For other values of DBGBCR<n>_EL1.BT, this register is RES0.
If breakpoint n is not implemented then accesses to this register are:
DBGBVR<n>_EL1 is a 64-bit register.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESS[14:8] | Bits[56:53] | Bits[52:49] | VA[48:2] | ||||||||||||||||||||||||||||
VA[48:2] | RES0 |
Reserved, Sign extended. Software must treat this field as RES0 if the most significant bit of VA is 0 or RES0, and as RES1 if the most significant bit of VA is 1.
Hardware always ignores the value of these bits and it is IMPLEMENTATION DEFINED whether:
Extension to VA[48:2]. For more information, see VA[48:2].
The reset behavior of this field is:
Extension to RESS[14:8]. For more information, see RESS[14:8].
Extension to VA[48:2]. For more information, see VA[48:2].
The reset behavior of this field is:
Extension to RESS[14:8]. For more information, see RESS[14:8].
If the address is being matched in an AArch64 stage 1 translation regime:
If the address is being matched in an AArch32 stage 1 translation regime, the first 20 bits of this field are RES0, and the rest of the field contains bits[31:2] of the address for comparison.
The reset behavior of this field is:
Reserved, RES0.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | |||||||||||||||||||||||||||||||
ContextID |
Reserved, RES0.
Context ID value for comparison.
The value is compared against CONTEXTIDR_EL2 when the Effective value of HCR_EL2.E2H is 1, and either:
Otherwise, the value is compared against the following:
CONTEXTIDR when the PE is executing at AArch32.
CONTEXTIDR_EL1 when the PE is executing at AArch64.
The reset behavior of this field is:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | |||||||||||||||||||||||||||||||
ContextID |
Reserved, RES0.
Context ID value for comparison against CONTEXTIDR_EL1.
The reset behavior of this field is:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | VMID[15:8] | VMID[7:0] | |||||||||||||||||||||||||||||
RES0 |
Reserved, RES0.
Extension to VMID[7:0]. For more information, see DBGBVR<n>_EL1.VMID[7:0].
If EL2 is using AArch32, this field is RES0.
The reset behavior of this field is:
Reserved, RES0.
VMID value for comparison.
The VMID is 8 bits when any of the following are true:
The reset behavior of this field is:
Reserved, RES0.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | VMID[15:8] | VMID[7:0] | |||||||||||||||||||||||||||||
ContextID |
Reserved, RES0.
Extension to VMID[7:0]. For more information, see DBGBVR<n>_EL1.VMID[7:0].
If EL2 is using AArch32, or if the implementation has an 8-bit VMID, this field is RES0.
The reset behavior of this field is:
Reserved, RES0.
VMID value for comparison.
The VMID is 8 bits when any of the following are true:
The reset behavior of this field is:
Context ID value for comparison against CONTEXTIDR_EL1.
The reset behavior of this field is:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ContextID2 | |||||||||||||||||||||||||||||||
RES0 |
Context ID value for comparison against CONTEXTIDR_EL2.
The reset behavior of this field is:
Reserved, RES0.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ContextID2 | |||||||||||||||||||||||||||||||
ContextID |
Context ID value for comparison against CONTEXTIDR_EL2.
The reset behavior of this field is:
Context ID value for comparison against CONTEXTIDR_EL1.
The reset behavior of this field is:
SoftwareLockStatus() depends on the type of access attempted and AllowExternalDebugAccess() has a new definition from Armv8.4. Refer to the Pseudocode definitions for more information.
Component | Offset | Instance | Range |
---|---|---|---|
Debug | 0x400 + (16 * n) | DBGBVR<n>_EL1 | 63:0 |
This interface is accessible as follows: