Defines the implementer and revisions of the AMU.
It is IMPLEMENTATION DEFINED whether AMIIDR is implemented in the Core power domain or in the Debug power domain.
This register is present only when FEAT_AMUv1 is implemented. Otherwise, direct accesses to AMIIDR are RES0.
AMIIDR is a:
This register is part of the AMU block.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | |||||||||||||||||||||||||||||||
ProductID | Variant | Revision | Implementer |
Reserved, RES0.
This field is an AMU part identifier.
If AMU.AMPIDR0 is implemented, AMU.AMPIDR0.PART_0 matches bits [27:20] of this field.
If AMU.AMPIDR1 is implemented, AMU.AMPIDR1.PART_1 matches bits [31:28] of this field.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
This field distinguishes product variants or major revisions of the product.
If AMU.AMPIDR2 is implemented, AMU.AMPIDR2.REVISION matches AMIIDR.Variant.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
This field distinguishes minor revisions of the product.
If AMU.AMPIDR3 is implemented, AMU.AMPIDR3.REVAND matches AMIIDR.Revision.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Contains the JEP106 code of the company that implemented the AMU.
For an Arm implementation, this field reads as 0x43B.
Bits [11:8] contain the JEP106 continuation code of the implementer.
Bit 7 is RES0
Bits [6:0] contain the JEP106 identity code of the implementer.
If AMU.AMPIDR4 is implemented, AMU.AMPIDR4.DES_2 matches bits [11:8] of this field.
If AMU.AMPIDR2 is implemented, AMU.AMPIDR2.DES_1 matches bits [6:4] of this field.
If AMU.AMPIDR1 is implemented, AMU.AMPIDR1.DES_0 matches bits [3:0] of this field.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ProductID | Variant | Revision | Implementer |
This field is an AMU part identifier.
If AMU.AMPIDR0 is implemented, AMU.AMPIDR0.PART_0 matches bits [27:20] of this field.
If AMU.AMPIDR1 is implemented, AMU.AMPIDR1.PART_1 matches bits [31:28] of this field.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
This field distinguishes product variants or major revisions of the product.
If AMU.AMPIDR2 is implemented, AMU.AMPIDR2.REVISION matches AMIIDR.Variant.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
This field distinguishes minor revisions of the product.
If AMU.AMPIDR3 is implemented, AMU.AMPIDR3.REVAND matches AMIIDR.Revision.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Contains the JEP106 code of the company that implemented the AMU.
For an Arm implementation, this field reads as 0x43B.
Bits [11:8] contain the JEP106 continuation code of the implementer.
Bit 7 is RES0
Bits [6:0] contain the JEP106 identity code of the implementer.
If AMU.AMPIDR4 is implemented, AMU.AMPIDR4.DES_2 matches bits [11:8] of this field.
If AMU.AMPIDR2 is implemented, AMU.AMPIDR2.DES_1 matches bits [6:4] of this field.
If AMU.AMPIDR1 is implemented, AMU.AMPIDR1.DES_0 matches bits [3:0] of this field.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Accesses to this register use the following encodings:
When FEAT_AMU_EXT64 is implementedAccessible at offset 0xE08 from AMU
Accesses on this interface are RO.
Accessible at offset 0xE08 from AMU
Accesses on this interface are RO.