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AMIIDR: Activity Monitors Implementation Identification Register

Purpose

Defines the implementer and revisions of the AMU.

Configuration

It is IMPLEMENTATION DEFINED whether AMIIDR is implemented in the Core power domain or in the Debug power domain.

This register is present only when FEAT_AMUv1 is implemented. Otherwise, direct accesses to AMIIDR are RES0.

Attributes

AMIIDR is a:

This register is part of the AMU block.

Field descriptions

When FEAT_AMU_EXT64 is implemented:

6362616059585756555453525150494847464544434241403938373635343332
313029282726252423222120191817161514131211109876543210
RES0
ProductIDVariantRevisionImplementer

Bits [63:32]

Reserved, RES0.

ProductID, bits [31:20]

This field is an AMU part identifier.

If AMU.AMPIDR0 is implemented, AMU.AMPIDR0.PART_0 matches bits [27:20] of this field.

If AMU.AMPIDR1 is implemented, AMU.AMPIDR1.PART_1 matches bits [31:28] of this field.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Variant, bits [19:16]

This field distinguishes product variants or major revisions of the product.

If AMU.AMPIDR2 is implemented, AMU.AMPIDR2.REVISION matches AMIIDR.Variant.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Revision, bits [15:12]

This field distinguishes minor revisions of the product.

If AMU.AMPIDR3 is implemented, AMU.AMPIDR3.REVAND matches AMIIDR.Revision.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Implementer, bits [11:0]

Contains the JEP106 code of the company that implemented the AMU.

For an Arm implementation, this field reads as 0x43B.

Bits [11:8] contain the JEP106 continuation code of the implementer.

Bit 7 is RES0

Bits [6:0] contain the JEP106 identity code of the implementer.

If AMU.AMPIDR4 is implemented, AMU.AMPIDR4.DES_2 matches bits [11:8] of this field.

If AMU.AMPIDR2 is implemented, AMU.AMPIDR2.DES_1 matches bits [6:4] of this field.

If AMU.AMPIDR1 is implemented, AMU.AMPIDR1.DES_0 matches bits [3:0] of this field.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Otherwise:

313029282726252423222120191817161514131211109876543210
ProductIDVariantRevisionImplementer

ProductID, bits [31:20]

This field is an AMU part identifier.

If AMU.AMPIDR0 is implemented, AMU.AMPIDR0.PART_0 matches bits [27:20] of this field.

If AMU.AMPIDR1 is implemented, AMU.AMPIDR1.PART_1 matches bits [31:28] of this field.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Variant, bits [19:16]

This field distinguishes product variants or major revisions of the product.

If AMU.AMPIDR2 is implemented, AMU.AMPIDR2.REVISION matches AMIIDR.Variant.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Revision, bits [15:12]

This field distinguishes minor revisions of the product.

If AMU.AMPIDR3 is implemented, AMU.AMPIDR3.REVAND matches AMIIDR.Revision.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Implementer, bits [11:0]

Contains the JEP106 code of the company that implemented the AMU.

For an Arm implementation, this field reads as 0x43B.

Bits [11:8] contain the JEP106 continuation code of the implementer.

Bit 7 is RES0

Bits [6:0] contain the JEP106 identity code of the implementer.

If AMU.AMPIDR4 is implemented, AMU.AMPIDR4.DES_2 matches bits [11:8] of this field.

If AMU.AMPIDR2 is implemented, AMU.AMPIDR2.DES_1 matches bits [6:4] of this field.

If AMU.AMPIDR1 is implemented, AMU.AMPIDR1.DES_0 matches bits [3:0] of this field.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Accessing AMIIDR

Accesses to this register use the following encodings:

When FEAT_AMU_EXT64 is implemented

Accessible at offset 0xE08 from AMU

Accesses on this interface are RO.

When FEAT_AMU_EXT32 is implemented

Accessible at offset 0xE08 from AMU

Accesses on this interface are RO.