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UAO: User Access Override

Purpose

Allows access to the User Access Override bit.

Configuration

This register is present only when FEAT_UAO is implemented. Otherwise, direct accesses to UAO are UNDEFINED.

Attributes

UAO is a 64-bit register.

Field descriptions

6362616059585756555453525150494847464544434241403938373635343332
313029282726252423222120191817161514131211109876543210
RES0
RES0UAORES0

Bits [63:24]

Reserved, RES0.

UAO, bit [23]

User Access Override.

UAOMeaning
0b0

The behavior of LDTR* and STTR* instructions is as defined in the base Armv8 architecture.

0b1

When executed at the following Exception levels, LDTR* and STTR* instructions behave as the equivalent LDR* and STR* instructions:

  • EL1.

  • EL2 when the Effective value of HCR_EL2.{E2H, TGE} is {1, 1}.

When executed at EL3, or at EL2 when the Effective value of HCR_EL2.{E2H, TGE} is not {1, 1}, the LDTR* and STTR* instructions behave as the equivalent LDR* and STR* instructions, regardless of the setting of the PSTATE.UAO bit.

Bits [22:0]

Reserved, RES0.

Accessing UAO

For more information about the operation of the MSR (immediate) accessor, see 'MSR (immediate)'.

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, UAO

op0op1CRnCRmop2
0b110b0000b01000b00100b100

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then X[t, 64] = Zeros(40):PSTATE.UAO:Zeros(23); elsif PSTATE.EL == EL2 then X[t, 64] = Zeros(40):PSTATE.UAO:Zeros(23); elsif PSTATE.EL == EL3 then X[t, 64] = Zeros(40):PSTATE.UAO:Zeros(23);

MSR UAO, <Xt>

op0op1CRnCRmop2
0b110b0000b01000b00100b100

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then PSTATE.UAO = X[t, 64]<23>; elsif PSTATE.EL == EL2 then PSTATE.UAO = X[t, 64]<23>; elsif PSTATE.EL == EL3 then PSTATE.UAO = X[t, 64]<23>;

MSR UAO, #<imm>

op0op1CRnop2
0b000b0000b01000b011