A Jazelle register, which provides operating system control of the Jazelle Extension.
This register is present only when AArch32 is supported. Otherwise, direct accesses to JOSCR are UNDEFINED.
JOSCR is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RAZ/WI | |||||||||||||||||||||||||||||||
Reserved, RAZ/WI.
Accesses to this register use the following encodings in the System register encoding space:
MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
| coproc | opc1 | CRn | CRm | opc2 |
|---|---|---|---|---|
| 0b1110 | 0b111 | 0b0001 | 0b0000 | 0b000 |
if PSTATE.EL == EL0 then if boolean IMPLEMENTATION_DEFINED "JOSCR UNDEFINED at EL0" then UNDEFINED; else R[t] = JOSCR; elsif PSTATE.EL == EL1 then R[t] = JOSCR; elsif PSTATE.EL == EL2 then R[t] = JOSCR; elsif PSTATE.EL == EL3 then R[t] = JOSCR;
MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
| coproc | opc1 | CRn | CRm | opc2 |
|---|---|---|---|---|
| 0b1110 | 0b111 | 0b0001 | 0b0000 | 0b000 |
if PSTATE.EL == EL0 then if boolean IMPLEMENTATION_DEFINED "JOSCR UNDEFINED at EL0" then UNDEFINED; else return; elsif PSTATE.EL == EL1 then return; elsif PSTATE.EL == EL2 then return; elsif PSTATE.EL == EL3 then return;