Provides EL2 controls for Trace.
AArch32 System register HTRFCR bits [31:0] are architecturally mapped to AArch64 System register TRFCR_EL2[31:0].
This register is present only when EL2 is capable of using AArch32 and FEAT_TRF is implemented. Otherwise, direct accesses to HTRFCR are UNDEFINED.
If EL2 is not implemented, this register is RES0 from Monitor mode when SCR.NS == 1.
HTRFCR is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | TS | RES0 | CX | RES0 | E2TRE | E0HTRE | |||||||||||||||||||||||||
Reserved, RES0.
Timestamp Control. Controls which timebase is used for trace timestamps.
| TS | Meaning |
|---|---|
| 0b00 |
The timestamp is controlled by TRFCR.TS. |
| 0b01 |
Virtual timestamp. The traced timestamp is the physical counter value minus the value of CNTVOFF. |
| 0b11 |
Physical timestamp. The traced timestamp is the physical counter value. |
When SelfHostedTraceEnabled() == FALSE, this field is ignored.
The reset behavior of this field is:
Reserved, RES0.
VMID Trace Enable.
| CX | Meaning |
|---|---|
| 0b0 |
VMID tracing is not allowed. |
| 0b1 |
VMID tracing is allowed. |
When SelfHostedTraceEnabled() == FALSE, this field is ignored.
The reset behavior of this field is:
Reserved, RES0.
EL2 Trace Enable.
| E2TRE | Meaning |
|---|---|
| 0b0 |
Tracing is prohibited at EL2. |
| 0b1 |
Tracing is allowed at EL2. |
When SelfHostedTraceEnabled() == FALSE, this field is ignored.
The reset behavior of this field is:
EL0 Trace Enable.
| E0HTRE | Meaning |
|---|---|
| 0b0 |
Tracing is prohibited at EL0 when HCR.TGE == 1. |
| 0b1 |
Tracing is allowed at EL0 when HCR.TGE == 1. |
This field is ignored if any of the following are true:
The reset behavior of this field is:
Accesses to this register use the following encodings in the System register encoding space:
MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
| coproc | opc1 | CRn | CRm | opc2 |
|---|---|---|---|---|
| 0b1111 | 0b100 | 0b0001 | 0b0010 | 0b001 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HSTR_EL2.T1 == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T1 == '1' then AArch32.TakeHypTrapException(0x03); else UNDEFINED; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && !ELUsingAArch32(EL3) && MDCR_EL3.TTRF == '1' then UNDEFINED; elsif HaveEL(EL3) && EL3SDDUndefPriority() && ELUsingAArch32(EL3) && SDCR.TTRF == '1' then UNDEFINED; elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TTRF == '1' then if EL3SDDUndef() then UNDEFINED; else AArch64.AArch32SystemAccessTrap(EL3, 0x03); elsif HaveEL(EL3) && ELUsingAArch32(EL3) && SDCR.TTRF == '1' then if EL3SDDUndef() then UNDEFINED; else AArch32.TakeMonitorTrapException(); else R[t] = HTRFCR; elsif PSTATE.EL == EL3 then if SCR.NS == '0' then UNDEFINED; else R[t] = HTRFCR;
MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
| coproc | opc1 | CRn | CRm | opc2 |
|---|---|---|---|---|
| 0b1111 | 0b100 | 0b0001 | 0b0010 | 0b001 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HSTR_EL2.T1 == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T1 == '1' then AArch32.TakeHypTrapException(0x03); else UNDEFINED; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && !ELUsingAArch32(EL3) && MDCR_EL3.TTRF == '1' then UNDEFINED; elsif HaveEL(EL3) && EL3SDDUndefPriority() && ELUsingAArch32(EL3) && SDCR.TTRF == '1' then UNDEFINED; elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TTRF == '1' then if EL3SDDUndef() then UNDEFINED; else AArch64.AArch32SystemAccessTrap(EL3, 0x03); elsif HaveEL(EL3) && ELUsingAArch32(EL3) && SDCR.TTRF == '1' then if EL3SDDUndef() then UNDEFINED; else AArch32.TakeMonitorTrapException(); else HTRFCR = R[t]; elsif PSTATE.EL == EL3 then if SCR.NS == '0' then UNDEFINED; else HTRFCR = R[t];